1. Field of the Invention
The present invention relates to a method of forming a semiconductor device.
Priority is claimed on Japanese Patent Application No. 2010-102109, Apr. 27, 2010, the content of which is incorporated herein by reference.
2. Description of the Related Art
Japanese Unexamined Patent Application, First Publication, No. JP-A-2001-210801 discloses a field-effect transistor (FET). In the field-effect transistor, a groove is formed in a semiconductor substrate, a gate insulating film is formed in the groove, and a gate electrode is further buried in the groove. Japanese Unexamined Patent Applications, First Publications, Nos. JP-A-2008-277320, JP-A-2002-368126, JP-A-H08-17946, JP-A-H08-316168, and JP-A-H09-321233 disclose methods of forming planar transistors. Those five methods include a method of forming a well region.